
signal:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400670 <_init>:
  400670:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400674:	910003fd 	mov	x29, sp
  400678:	9400004c 	bl	4007a8 <call_weak_fn>
  40067c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400680:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400690 <.plt>:
  400690:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400694:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf514>
  400698:	f947fe11 	ldr	x17, [x16, #4088]
  40069c:	913fe210 	add	x16, x16, #0xff8
  4006a0:	d61f0220 	br	x17
  4006a4:	d503201f 	nop
  4006a8:	d503201f 	nop
  4006ac:	d503201f 	nop

00000000004006b0 <exit@plt>:
  4006b0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006b4:	f9400211 	ldr	x17, [x16]
  4006b8:	91000210 	add	x16, x16, #0x0
  4006bc:	d61f0220 	br	x17

00000000004006c0 <sigprocmask@plt>:
  4006c0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006c4:	f9400611 	ldr	x17, [x16, #8]
  4006c8:	91002210 	add	x16, x16, #0x8
  4006cc:	d61f0220 	br	x17

00000000004006d0 <atoi@plt>:
  4006d0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006d4:	f9400a11 	ldr	x17, [x16, #16]
  4006d8:	91004210 	add	x16, x16, #0x10
  4006dc:	d61f0220 	br	x17

00000000004006e0 <sigemptyset@plt>:
  4006e0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006e4:	f9400e11 	ldr	x17, [x16, #24]
  4006e8:	91006210 	add	x16, x16, #0x18
  4006ec:	d61f0220 	br	x17

00000000004006f0 <__libc_start_main@plt>:
  4006f0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006f4:	f9401211 	ldr	x17, [x16, #32]
  4006f8:	91008210 	add	x16, x16, #0x20
  4006fc:	d61f0220 	br	x17

0000000000400700 <__gmon_start__@plt>:
  400700:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400704:	f9401611 	ldr	x17, [x16, #40]
  400708:	9100a210 	add	x16, x16, #0x28
  40070c:	d61f0220 	br	x17

0000000000400710 <abort@plt>:
  400710:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400714:	f9401a11 	ldr	x17, [x16, #48]
  400718:	9100c210 	add	x16, x16, #0x30
  40071c:	d61f0220 	br	x17

0000000000400720 <puts@plt>:
  400720:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400724:	f9401e11 	ldr	x17, [x16, #56]
  400728:	9100e210 	add	x16, x16, #0x38
  40072c:	d61f0220 	br	x17

0000000000400730 <fwrite@plt>:
  400730:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400734:	f9402211 	ldr	x17, [x16, #64]
  400738:	91010210 	add	x16, x16, #0x40
  40073c:	d61f0220 	br	x17

0000000000400740 <sigaddset@plt>:
  400740:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400744:	f9402611 	ldr	x17, [x16, #72]
  400748:	91012210 	add	x16, x16, #0x48
  40074c:	d61f0220 	br	x17

0000000000400750 <printf@plt>:
  400750:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400754:	f9402a11 	ldr	x17, [x16, #80]
  400758:	91014210 	add	x16, x16, #0x50
  40075c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400760 <_start>:
  400760:	d280001d 	mov	x29, #0x0                   	// #0
  400764:	d280001e 	mov	x30, #0x0                   	// #0
  400768:	aa0003e5 	mov	x5, x0
  40076c:	f94003e1 	ldr	x1, [sp]
  400770:	910023e2 	add	x2, sp, #0x8
  400774:	910003e6 	mov	x6, sp
  400778:	580000c0 	ldr	x0, 400790 <_start+0x30>
  40077c:	580000e3 	ldr	x3, 400798 <_start+0x38>
  400780:	58000104 	ldr	x4, 4007a0 <_start+0x40>
  400784:	97ffffdb 	bl	4006f0 <__libc_start_main@plt>
  400788:	97ffffe2 	bl	400710 <abort@plt>
  40078c:	00000000 	.inst	0x00000000 ; undefined
  400790:	0040085c 	.word	0x0040085c
  400794:	00000000 	.word	0x00000000
  400798:	004009a0 	.word	0x004009a0
  40079c:	00000000 	.word	0x00000000
  4007a0:	00400a20 	.word	0x00400a20
  4007a4:	00000000 	.word	0x00000000

00000000004007a8 <call_weak_fn>:
  4007a8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf514>
  4007ac:	f947f000 	ldr	x0, [x0, #4064]
  4007b0:	b4000040 	cbz	x0, 4007b8 <call_weak_fn+0x10>
  4007b4:	17ffffd3 	b	400700 <__gmon_start__@plt>
  4007b8:	d65f03c0 	ret
  4007bc:	00000000 	.inst	0x00000000 ; undefined

00000000004007c0 <deregister_tm_clones>:
  4007c0:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  4007c4:	9101a000 	add	x0, x0, #0x68
  4007c8:	b0000081 	adrp	x1, 411000 <exit@GLIBC_2.17>
  4007cc:	9101a021 	add	x1, x1, #0x68
  4007d0:	eb00003f 	cmp	x1, x0
  4007d4:	540000a0 	b.eq	4007e8 <deregister_tm_clones+0x28>  // b.none
  4007d8:	90000001 	adrp	x1, 400000 <_init-0x670>
  4007dc:	f9452021 	ldr	x1, [x1, #2624]
  4007e0:	b4000041 	cbz	x1, 4007e8 <deregister_tm_clones+0x28>
  4007e4:	d61f0020 	br	x1
  4007e8:	d65f03c0 	ret
  4007ec:	d503201f 	nop

00000000004007f0 <register_tm_clones>:
  4007f0:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  4007f4:	9101a000 	add	x0, x0, #0x68
  4007f8:	b0000081 	adrp	x1, 411000 <exit@GLIBC_2.17>
  4007fc:	9101a021 	add	x1, x1, #0x68
  400800:	cb000021 	sub	x1, x1, x0
  400804:	9343fc21 	asr	x1, x1, #3
  400808:	8b41fc21 	add	x1, x1, x1, lsr #63
  40080c:	9341fc21 	asr	x1, x1, #1
  400810:	b40000a1 	cbz	x1, 400824 <register_tm_clones+0x34>
  400814:	90000002 	adrp	x2, 400000 <_init-0x670>
  400818:	f9452442 	ldr	x2, [x2, #2632]
  40081c:	b4000042 	cbz	x2, 400824 <register_tm_clones+0x34>
  400820:	d61f0040 	br	x2
  400824:	d65f03c0 	ret

0000000000400828 <__do_global_dtors_aux>:
  400828:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40082c:	910003fd 	mov	x29, sp
  400830:	f9000bf3 	str	x19, [sp, #16]
  400834:	b0000093 	adrp	x19, 411000 <exit@GLIBC_2.17>
  400838:	3941c260 	ldrb	w0, [x19, #112]
  40083c:	35000080 	cbnz	w0, 40084c <__do_global_dtors_aux+0x24>
  400840:	97ffffe0 	bl	4007c0 <deregister_tm_clones>
  400844:	52800020 	mov	w0, #0x1                   	// #1
  400848:	3901c260 	strb	w0, [x19, #112]
  40084c:	f9400bf3 	ldr	x19, [sp, #16]
  400850:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400854:	d65f03c0 	ret

0000000000400858 <frame_dummy>:
  400858:	17ffffe6 	b	4007f0 <register_tm_clones>

000000000040085c <main>:
  40085c:	a9b57bfd 	stp	x29, x30, [sp, #-176]!
  400860:	910003fd 	mov	x29, sp
  400864:	b9001fa0 	str	w0, [x29, #28]
  400868:	f9000ba1 	str	x1, [x29, #16]
  40086c:	b9401fa0 	ldr	w0, [x29, #28]
  400870:	7100081f 	cmp	w0, #0x2
  400874:	54000100 	b.eq	400894 <main+0x38>  // b.none
  400878:	f9400ba0 	ldr	x0, [x29, #16]
  40087c:	f9400001 	ldr	x1, [x0]
  400880:	90000000 	adrp	x0, 400000 <_init-0x670>
  400884:	91294000 	add	x0, x0, #0xa50
  400888:	97ffffb2 	bl	400750 <printf@plt>
  40088c:	52800020 	mov	w0, #0x1                   	// #1
  400890:	97ffff88 	bl	4006b0 <exit@plt>
  400894:	f9400ba0 	ldr	x0, [x29, #16]
  400898:	91002000 	add	x0, x0, #0x8
  40089c:	f9400000 	ldr	x0, [x0]
  4008a0:	97ffff8c 	bl	4006d0 <atoi@plt>
  4008a4:	b900aba0 	str	w0, [x29, #168]
  4008a8:	b940aba0 	ldr	w0, [x29, #168]
  4008ac:	7100001f 	cmp	w0, #0x0
  4008b0:	5400006c 	b.gt	4008bc <main+0x60>
  4008b4:	52800140 	mov	w0, #0xa                   	// #10
  4008b8:	b900aba0 	str	w0, [x29, #168]
  4008bc:	9100a3a0 	add	x0, x29, #0x28
  4008c0:	97ffff88 	bl	4006e0 <sigemptyset@plt>
  4008c4:	9100a3a0 	add	x0, x29, #0x28
  4008c8:	52800041 	mov	w1, #0x2                   	// #2
  4008cc:	97ffff9d 	bl	400740 <sigaddset@plt>
  4008d0:	9100a3a0 	add	x0, x29, #0x28
  4008d4:	d2800002 	mov	x2, #0x0                   	// #0
  4008d8:	aa0003e1 	mov	x1, x0
  4008dc:	52800000 	mov	w0, #0x0                   	// #0
  4008e0:	97ffff78 	bl	4006c0 <sigprocmask@plt>
  4008e4:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  4008e8:	9101a000 	add	x0, x0, #0x68
  4008ec:	f9400001 	ldr	x1, [x0]
  4008f0:	90000000 	adrp	x0, 400000 <_init-0x670>
  4008f4:	9129c000 	add	x0, x0, #0xa70
  4008f8:	aa0103e3 	mov	x3, x1
  4008fc:	d28002c2 	mov	x2, #0x16                  	// #22
  400900:	d2800021 	mov	x1, #0x1                   	// #1
  400904:	97ffff8b 	bl	400730 <fwrite@plt>
  400908:	b900afbf 	str	wzr, [x29, #172]
  40090c:	14000007 	b	400928 <main+0xcc>
  400910:	90000000 	adrp	x0, 400000 <_init-0x670>
  400914:	912a2000 	add	x0, x0, #0xa88
  400918:	97ffff82 	bl	400720 <puts@plt>
  40091c:	b940afa0 	ldr	w0, [x29, #172]
  400920:	11000400 	add	w0, w0, #0x1
  400924:	b900afa0 	str	w0, [x29, #172]
  400928:	b940afa0 	ldr	w0, [x29, #172]
  40092c:	7100041f 	cmp	w0, #0x1
  400930:	54ffff0d 	b.le	400910 <main+0xb4>
  400934:	9100a3a0 	add	x0, x29, #0x28
  400938:	d2800002 	mov	x2, #0x0                   	// #0
  40093c:	aa0003e1 	mov	x1, x0
  400940:	52800020 	mov	w0, #0x1                   	// #1
  400944:	97ffff5f 	bl	4006c0 <sigprocmask@plt>
  400948:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  40094c:	9101a000 	add	x0, x0, #0x68
  400950:	f9400001 	ldr	x1, [x0]
  400954:	90000000 	adrp	x0, 400000 <_init-0x670>
  400958:	912aa000 	add	x0, x0, #0xaa8
  40095c:	aa0103e3 	mov	x3, x1
  400960:	d2800302 	mov	x2, #0x18                  	// #24
  400964:	d2800021 	mov	x1, #0x1                   	// #1
  400968:	97ffff72 	bl	400730 <fwrite@plt>
  40096c:	b900afbf 	str	wzr, [x29, #172]
  400970:	14000007 	b	40098c <main+0x130>
  400974:	90000000 	adrp	x0, 400000 <_init-0x670>
  400978:	912b2000 	add	x0, x0, #0xac8
  40097c:	97ffff69 	bl	400720 <puts@plt>
  400980:	b940afa0 	ldr	w0, [x29, #172]
  400984:	11000400 	add	w0, w0, #0x1
  400988:	b900afa0 	str	w0, [x29, #172]
  40098c:	b940afa0 	ldr	w0, [x29, #172]
  400990:	7100041f 	cmp	w0, #0x1
  400994:	54ffff0d 	b.le	400974 <main+0x118>
  400998:	17ffffce 	b	4008d0 <main+0x74>
  40099c:	00000000 	.inst	0x00000000 ; undefined

00000000004009a0 <__libc_csu_init>:
  4009a0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4009a4:	910003fd 	mov	x29, sp
  4009a8:	a901d7f4 	stp	x20, x21, [sp, #24]
  4009ac:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf514>
  4009b0:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf514>
  4009b4:	91374294 	add	x20, x20, #0xdd0
  4009b8:	913722b5 	add	x21, x21, #0xdc8
  4009bc:	a902dff6 	stp	x22, x23, [sp, #40]
  4009c0:	cb150294 	sub	x20, x20, x21
  4009c4:	f9001ff8 	str	x24, [sp, #56]
  4009c8:	2a0003f6 	mov	w22, w0
  4009cc:	aa0103f7 	mov	x23, x1
  4009d0:	9343fe94 	asr	x20, x20, #3
  4009d4:	aa0203f8 	mov	x24, x2
  4009d8:	97ffff26 	bl	400670 <_init>
  4009dc:	b4000194 	cbz	x20, 400a0c <__libc_csu_init+0x6c>
  4009e0:	f9000bb3 	str	x19, [x29, #16]
  4009e4:	d2800013 	mov	x19, #0x0                   	// #0
  4009e8:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4009ec:	aa1803e2 	mov	x2, x24
  4009f0:	aa1703e1 	mov	x1, x23
  4009f4:	2a1603e0 	mov	w0, w22
  4009f8:	91000673 	add	x19, x19, #0x1
  4009fc:	d63f0060 	blr	x3
  400a00:	eb13029f 	cmp	x20, x19
  400a04:	54ffff21 	b.ne	4009e8 <__libc_csu_init+0x48>  // b.any
  400a08:	f9400bb3 	ldr	x19, [x29, #16]
  400a0c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400a10:	a942dff6 	ldp	x22, x23, [sp, #40]
  400a14:	f9401ff8 	ldr	x24, [sp, #56]
  400a18:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400a1c:	d65f03c0 	ret

0000000000400a20 <__libc_csu_fini>:
  400a20:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400a24 <_fini>:
  400a24:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a28:	910003fd 	mov	x29, sp
  400a2c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a30:	d65f03c0 	ret
